Analysis AMD lied about the true number of Bulldozer cores in some of its Opteron and FX processors, it is claimed.
Mini-chipzilla boasted that, depending on the model, the chips had either four, six, eight or 16 Bulldozer cores. A class-action lawsuit [PDF] alleges the real figures are half that.
More ReadingAMD to fix slippery hypervisor-busting bug in its CPU microcodeIs that light at the end of AMD's dark tunnel, or God sparking up a cig?AMD's 64-bit ARM server chip Seattle finally flies the coop ... but where will it call home?OMG Captain Skywalker, here comes AMD's new Merlin Falcon doing Warp 9 to the Tardis$65m write-down, ARM chips ship: A 90-second guide to Planet AMD
The troubled California giant is being sued in San Jose's district court, accused of false advertising, fraud, negligent misrepresentation and unjust enrichment. The biz may have to fork out at least $5m in damages and legal bills if it is defeated.
At the heart of the matter is the design of the Bulldozer microarchitecture: AMD groups Bulldozer cores into pairs, and each pair is called a module. So, for example, an eight-core processor has four modules.
Within each module, alongside the two x86 cores, is a single branch prediction engine, a single instruction fetch and decode stage, a single floating-point math unit, a single cache controller, a single 64K L1 instruction cache, a single microcode ROM, and a single 2MB L2 cache.
In other words, in each module, the cores share a lot of plumbing to fetch, decode and execute software instructions. Individually, the cores have their own integer math unit, load-store engine, and other bits and pieces.
Below is a silicon die floor plan of what AMD calls a four-module, eight-core processor using the Bulldozer architecture. You can see the four modules, four sets of L2 caches and four sets of L3 caches.
Now let's look inside each module. As you can see, there are two cores next to each other, and shared blocks of electronics. The branch prediction engine tries to guess which instructions the running thread will execute next, allowing it to fetch and decode program code early and optimize execution. There's also a single floating-point math unit shared between the core twins.
Next, let's break down that module's floor plan. Here we see that each core has its own integer math scheduler and execution unit, a 16K L1 data cache, and load-store unit.
These blueprints borrow from the DEC Alpha's clustered integer core architecture [PDF]. When processing integer calculations, each Bulldozer module acts as a dual-core processor. And here's the rub: when crunching more complex math, each module only has one floating-point unit.
That suggests each module drops down to single-core performance when crunching floating-point values, although AMD insists its design allows two threads to access the FPU at the same time so the performance hit isn't the end of the world.
The lawsuit, filed at the end of October, disagrees: it claims it is impossible for an eight-core Bulldozer-powered processor to truly execute eight instructions simultaneously – it cannot run eight complex math calculations at any one moment due to the shared FPU design, in other words. (Intel cores, for what it's worth, have their own separate floating-point math units.)
"In claiming that its Bulldozer CPU had '8-cores,' AMD tricked consumers into buying its Bulldozer processors by overstating the number of cores contained in the Bulldozer chips," the lawsuit's paperwork reads.
"In fact, the Bulldozer chips functionally have only four cores — not eight, as advertised. Notably, AMD built the Bulldozer processors by stripping away components from two cores and combining what was left to make a single 'module.' But by removing certain components of two cores to make one module, they no longer work independently. As a result, AMD’s Bulldozers suffer from material performance degradation and cannot perform eight instructions simultaneously and independently as claimed.
"Average consumers in the market for computer CPUs lack the requisite technical expertise to understand the design of Defendant’s processors, and trust Defendant to convey accurate specifications regarding its CPUs. Because AMD did not convey accurate specifications, tens of thousands of consumers have been misled into buying Bulldozer CPUs that do not conform to what AMD advertised, and cannot perform the way a true eight core CPU would (i.e., perform eight calculations simultaneously)."
The legal challenge was launched by a chap called Tony Dickey, who lives in Alabama, US. In March this year, he bought two AMD FX-9590 chips for $299 online after seeing them advertised on AMD.com as eight-core processors, but later felt cheated when he learned of the CPU's architecture.
The Bulldozer designs are used in the two-module, four-core FX-4100, FX-4130, and FX-4170; the three-module, six-core FX-6100, FX-6120, and FX-6200; the four-module, eight-core FX-8100, FX-8120, and FX-8150; and the Opteron 4200 series (up to eight cores) and 6200 series (up to 16 cores). The first processors using the microarchitecture went on sale in 2011.
In all, it raises a fascinating legal question: at what point does a collection of transistor gates equal a processor core? When it grows an instruction decode engine? When it gets its own floating-point math unit? Unless there's an out-of-court settlement, a judge in the heart of Silicon Valley will have to define, legally, where a computer processor starts and ends.
Of course, such a ruling will be avoided if AMD proves its eight-core Bulldozer processors do not drop to four-core performance in multithreaded FPU benchmark tests.
AMD was not available for immediate comment. ®