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IBM builds alliance to tackle 32nm design

Impacted with Chartered and Samsung

By Dan Goodin in San Francisco • Get more from this author

Posted in IT Channel, 23rd May 2007 19:50 GMT

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IBM is teaming up with four other chipmakers to develop manufacturing technologies for semiconductors that shrink the average circuit feature to 32 nanometers. The alliance, which is aimed at containing the spiraling cost of building bleeding-edge chips, also involves Chartered Semiconductor, Samsung Electronics, Infineon Technologies and Freescale Semiconductor.

The joint development agreement announced Wednesday builds off previous pacts to pool resources on processes for 90nm, 65nm and 45nm chips. In addition to including work on 32nm bulk complementary metal oxide semiconductor (CMOS) process technology, it includes development of process design kits used to support that technology. The agreement is effective through 2010.

To hear IBM and the others tell it, their collaboration is a testament to their leadership in innovation.

In fact, these companies have no other choice if they hope to remain in business. The cost of adopting a new process node has mushroomed to about $4bn, according to Risto Puhakka, of VLSI Research.

With Intel expected to begin production of 32nm chips in the 2009 timeframe, these other companies are under real pressure to follow suit, even though their purses are significantly smaller than Intel's.

As was the case in the past, the joint development agreement calls for research to be conducted at IBM's 300mm-wafer fab in East Fishkill, New York.

IBM and Advanced Micro Devices already have a joint development agreement in place through 2011. ®

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