AMD's upcoming 'Barcelona' quad-core Opteron CPU will deliver just "a few percentage points of added performance here and there", a company official has admitted. Instead, many of the tweaks improve the design of the part's architecture, including FB-DIMM support.
So claimed Ben Sander, speaking at the Fall Processor Forum in San Jose yesterday, according to an EETimes report. Among the enhancements revealed by Sander: a doubling of the width of the bus feeding the chip's vector processing engine to 128 bits and an upgraded memory controller design.
So, the quadie Opteron's memory controller will support DDR 3 and FB-DIMM memory configurations, Sander confirmed. Both memory types have appeared on leaked AMD presentation slides, but of late it has been claimed AMD will not support FB-DIMM. Not so - the quad-core Opteron will do so, even though AMD reckons few OEMs will take advantage of the fact.
Barcelona will have two memory controllers, one for each pair of cores and both of which are able to operate independently of the other, Sander said, to boost memory operational efficiency.
Sander also confirmed the chip will contains 2MB of L3 cache in addition to each core's 512KB of L2 cache, a feature again already made public through leaked information. However, Barcelona will also incorporate hardware-controlled memory page nesting to accelerate the manipulation of memory addresses when the CPU's virtualisation technology is in operation. This is usually handled by the hypervisor software, so should yield a significant speed-up, Sander indicated. ®