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By | Ashlee Vance 24th October 2005 23:12

Intel delays and slows dual-core Itanium

Quality issues and price/performance woes

Intel has ripped open another huge hole on the troubled ship Itanic, saying that the dual-core Montecito chip won't arrive until mid-2006 and will come in much slower than expected.

Just two weeks ago, Intel told reporters that Montecito would begin shipping at the end of this year and ramp to volume in the first quarter of 2006. Not so. A quality issue of mysterious origins has pushed delivery back to the middle of next year and left the chip limping along at 1.6GHz instead of 2.0GHz - a result of the Foxton power management technology being nixed for the chip. In addition, the successor chip Montvale won't ship until 2007 now and Tukwila won't arrive until 2008.

These delays serve as huge blows to Itanium's two main customers - HP and SGI. Both companies had been depending on Intel to catch up finally with rivals IBM and Sun Microsystems. Customers will be most displeased to see Itanium fall close to five years behind IBM with dual-core technology.

Intel also delivered some shockers on the Xeon front, although it pitched these changes as positives instead of negatives.

It has cancelled the multicore Whitefield chip and replaced it with a product called Tigerton. Grrr. The Tigerton chip will now be part of the new Caneland platform for Xeon MP chips, as Intel has cancelled the Reidland platform associated with Whitefield.

Intel seems to have some kind of answer to AMD's direct connect architecture planned with Tigerton called the "high-speed interconnect." This will give each processor its own connection to the chipset instead running data through a shared front-side bus. Intel's dependency on the front side bus has been one of its major handicaps in trying to compete with AMD's better performing Opteron chips.

Intel said that this new technology will not replace the "next-generation interconnect" it has planned for future chips.

Here, however, is the bad news. This shift in architectures will cause another delay in Intel's plans to develop a shared socket design between the Itanium and Xeon chips. This design promised to make the pricey Itanic systems more affordable. Intel once planned to introduce the common design in 2007. It won't ship the design now for Itanium systems until 2008 and refuses to release a date for a Xeon version of the design.

This flood of announcements could well be remembered as the day Itanium died. ®

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